• Elegant CPUs

    From Buzz McCool@buzz_mccool@yahoo.com to comp.lang.forth on Mon Dec 1 15:36:14 2025
    From Newsgroup: comp.lang.forth

    I have been impressed with one of our frequent contributor's encyclopedic knowledge of 21st century microprocessor architectures during my occasional forays to comp.arch .

    This may be slightly off-topic for comp.lang.forth but as this is a more intimate group with a great deal of both knowledge and opinion, let's couch this in terms of microprocessors that can run Forth well on Linux.

    Is there a particular CPU that shines in overall architectural elegance?
    Which microprocessor is closest to getting it all right? Is it just a
    matter of buying the latest available from ARM / Intel / AMD or are
    newer models using cores & kludges to gain performance whereas a system based on a 4.4Ghz Intel Pentium Gold 8505 is really the choice for someone who wants a brilliantly executed machine?

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  • From Paul Rubin@no.email@nospam.invalid to comp.lang.forth on Mon Dec 1 22:25:32 2025
    From Newsgroup: comp.lang.forth

    Buzz McCool <buzz_mccool@yahoo.com> writes:
    let's couch this in terms of microprocessors that can run Forth well
    on Linux... are newer models using cores & kludges to gain
    performance ... ?

    Users mostly care about performances more than about architectural
    brilliance, and so if a vendor can gain performance by adding cores and kludges, they have strong incentive to do so regardless of how much
    elegance they started with. And elegant architectures for Forth are
    probably not well suited for Linux and vice versa. Succesful Linux
    CPU's have quite a lot of registers and while fancy Forth compilers can
    make use of them, you end up with an abstraction inversion, simulating a
    stack machine that way.

    You might like the TI MSP430 which is a 16-bit MCU line inspired by the
    PDP-11. It can't run Linux and it's now mostly eclipsed by ARM Cortex-M
    and maybe soon Risc-V MCU's, but its CISC-style addressing modes are
    convenient for Forth, and its hardware implementations have some neat
    features like built in non-volatile (ferromagnetic) RAM in some models.
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  • From albert@albert@spenarnc.xs4all.nl to comp.lang.forth on Tue Dec 2 10:52:44 2025
    From Newsgroup: comp.lang.forth

    In article <87o6ohh02r.fsf@nightsong.com>,
    Paul Rubin <no.email@nospam.invalid> wrote:
    Buzz McCool <buzz_mccool@yahoo.com> writes:
    let's couch this in terms of microprocessors that can run Forth well
    on Linux... are newer models using cores & kludges to gain
    performance ... ?

    Users mostly care about performances more than about architectural >brilliance, and so if a vendor can gain performance by adding cores and >kludges, they have strong incentive to do so regardless of how much
    elegance they started with. And elegant architectures for Forth are
    probably not well suited for Linux and vice versa. Succesful Linux
    CPU's have quite a lot of registers and while fancy Forth compilers can
    make use of them, you end up with an abstraction inversion, simulating a >stack machine that way.

    You might like the TI MSP430 which is a 16-bit MCU line inspired by the >PDP-11. It can't run Linux and it's now mostly eclipsed by ARM Cortex-M
    and maybe soon Risc-V MCU's, but its CISC-style addressing modes are >convenient for Forth, and its hardware implementations have some neat >features like built in non-volatile (ferromagnetic) RAM in some models.

    See noforth made by Willem Ouwerkerk, for several SBC MSP430's.
    (Nowadays RISCV too.)

    https://home.hccnet.nl/anij/nof/noforth.html

    I've used it to have a 9600 to 31.5 baud convertor in behalf of midi.
    Supports IOT, by wireless transmission (extra hardware needed).

    Groetjes Albert
    --
    The Chinese government is satisfied with its military superiority over USA.
    The next 5 year plan has as primary goal to advance life expectancy
    over 80 years, like Western Europe.
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  • From Buzz McCool@buzz_mccool@yahoo.com to comp.lang.forth on Tue Dec 2 10:12:51 2025
    From Newsgroup: comp.lang.forth

    On 12/1/2025 10:25 PM, Paul Rubin wrote:
    Users mostly care about performances more than about architectural brilliance, and so if a vendor can gain performance by adding cores and kludges, they have strong incentive to do so regardless of how much
    elegance they started with. ...

    Understood, and thanks for the information about the TI MSP430.

    It's a bit silly, but I like to peruse this benchmark site and think about getting a system powered by some forgotten gem. https://www.cpubenchmark.net/cpu_value_alltime.html




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  • From anton@anton@mips.complang.tuwien.ac.at (Anton Ertl) to comp.lang.forth on Tue Dec 2 18:12:09 2025
    From Newsgroup: comp.lang.forth

    Buzz McCool <buzz_mccool@yahoo.com> writes:
    Is there a particular CPU that shines in overall architectural elegance?

    Elegance is for tailors:-)

    If you look at RISC-V (e.g. the instructions in RV64GC), it shows a
    certain minimalism compared to its competitors AMD64 and ARM A64.
    That also shows in the size of the RISC-V manual compared to the
    manuals of its competitors.

    Which microprocessor is closest to getting it all right? Is it just a
    matter of buying the latest available from ARM / Intel / AMD or are
    newer models using cores & kludges to gain performance whereas a system based >on a 4.4Ghz Intel Pentium Gold 8505 is really the choice for someone who wants >a brilliantly executed machine?

    The Pentium 8505 is an Alder Lake U with half of it's P-cores and half
    of its E-Cores disabled, and some of the cache, leaving 1 P-Core and 4
    E-cores. If you want the best performance, there are certainly a
    number of microarchitectures by AMD, Apple, ARM, Intel, and Qualcomm
    that compete for that spot and show fascinating feats in clock rate
    and instructions per cycle (IPC), and the cores in the Pentium 8505
    are not far behind; newer microarchitectures are better. If you want
    something small, maybe look for the ARM Cortex M0 or one of the small
    RISC-V cores.

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
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  • From anton@anton@mips.complang.tuwien.ac.at (Anton Ertl) to comp.lang.forth on Tue Dec 2 18:37:08 2025
    From Newsgroup: comp.lang.forth

    Paul Rubin <no.email@nospam.invalid> writes:
    Succesful Linux
    CPU's have quite a lot of registers and while fancy Forth compilers can
    make use of them, you end up with an abstraction inversion

    That's what you have claimed repeatedly. That would be true if the
    programmers actually wanted a register machine and simulated that in
    some way with the stack. That's not what is happening. The stack is
    a good abstraction for passing operands and parameters. That's why it
    is used in Forth, in the JavaVM, in WebAssembly, and elsewhere. The
    stack is not a good abstraction for dealing with lots of values,
    that's why Forth has locals, the Java VM has local variables, and
    WebAssembly has locals.

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
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  • From Buzz McCool@buzz_mccool@yahoo.com to comp.lang.forth on Tue Dec 2 11:00:25 2025
    From Newsgroup: comp.lang.forth

    On 12/2/2025 10:12 AM, Anton Ertl wrote:

    The Pentium 8505 is an Alder Lake U with half of it's P-cores and half
    of its E-Cores disabled, and some of the cache, leaving 1 P-Core and 4 E-cores. If you want the best performance, there are certainly a
    number of microarchitectures by AMD, Apple, ARM, Intel, and Qualcomm
    that compete for that spot and show fascinating feats in clock rate
    and instructions per cycle (IPC), and the cores in the Pentium 8505
    are not far behind; newer microarchitectures are better. If you want something small, maybe look for the ARM Cortex M0 or one of the small
    RISC-V cores.
    Thanks Anton. May I ask if you have a particular CPU that you find
    pleasurable to use in your daily work?

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  • From David Schultz@david.schultz@earthlink.net to comp.lang.forth on Tue Dec 2 16:33:30 2025
    From Newsgroup: comp.lang.forth

    On 12/2/25 12:25 AM, Paul Rubin wrote:
    You might like the TI MSP430 which is a 16-bit MCU line inspired by the PDP-11. It can't run Linux and it's now mostly eclipsed by ARM Cortex-M
    and maybe soon Risc-V MCU's, but its CISC-style addressing modes are convenient for Forth, and its hardware implementations have some neat features like built in non-volatile (ferromagnetic) RAM in some models.

    I ported eForth to an FRAM MSP430:

    http://davesrocketworks.com/electronics/msp430/eforth/index.html


    Having fiddled with ARM (an eForth for that too) I can safely say that
    the MSP430 is better for low power applications. You can put an ARM into something resembling a low power mode but it takes forever to start up
    again. At least in comparison to the MSP430.
    --
    http://davesrocketworks.com
    David Schultz
    "The cheaper the crook, the gaudier the patter." - Sam Spade
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  • From albert@albert@spenarnc.xs4all.nl to comp.lang.forth on Wed Dec 3 12:59:42 2025
    From Newsgroup: comp.lang.forth

    In article <2025Dec2.193708@mips.complang.tuwien.ac.at>,
    Anton Ertl <anton@mips.complang.tuwien.ac.at> wrote:
    Paul Rubin <no.email@nospam.invalid> writes:
    Succesful Linux
    CPU's have quite a lot of registers and while fancy Forth compilers can >>make use of them, you end up with an abstraction inversion

    That's what you have claimed repeatedly. That would be true if the >programmers actually wanted a register machine and simulated that in
    some way with the stack. That's not what is happening. The stack is
    a good abstraction for passing operands and parameters. That's why it
    is used in Forth, in the JavaVM, in WebAssembly, and elsewhere. The
    stack is not a good abstraction for dealing with lots of values,
    that's why Forth has locals, the Java VM has local variables, and
    WebAssembly has locals.

    In riscv you can spare 25+ registers to hold LOCAL to-values.
    As long as you take care of the chance of recursion,
    can be very efficient.

    - anton

    Groetjes Albert
    --
    The Chinese government is satisfied with its military superiority over USA.
    The next 5 year plan has as primary goal to advance life expectancy
    over 80 years, like Western Europe.
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  • From albert@albert@spenarnc.xs4all.nl to comp.lang.forth on Wed Dec 3 13:02:42 2025
    From Newsgroup: comp.lang.forth

    In article <%OJXQ.110578$mEQ5.8101@fx37.iad>,
    David Schultz <david.schultz@earthlink.net> wrote:
    On 12/2/25 12:25 AM, Paul Rubin wrote:
    You might like the TI MSP430 which is a 16-bit MCU line inspired by the
    PDP-11. It can't run Linux and it's now mostly eclipsed by ARM Cortex-M
    and maybe soon Risc-V MCU's, but its CISC-style addressing modes are
    convenient for Forth, and its hardware implementations have some neat
    features like built in non-volatile (ferromagnetic) RAM in some models.

    I ported eForth to an FRAM MSP430:

    http://davesrocketworks.com/electronics/msp430/eforth/index.html


    Having fiddled with ARM (an eForth for that too) I can safely say that
    the MSP430 is better for low power applications. You can put an ARM into >something resembling a low power mode but it takes forever to start up
    again. At least in comparison to the MSP430.

    Small wonder. The PSP430 was especially designed for low power.
    Willem Ouwerkerk has made applications that uses a sub uA current drain.

    David Schultz

    Groetjes Albert
    --
    The Chinese government is satisfied with its military superiority over USA.
    The next 5 year plan has as primary goal to advance life expectancy
    over 80 years, like Western Europe.
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  • From anton@anton@mips.complang.tuwien.ac.at (Anton Ertl) to comp.lang.forth on Wed Dec 3 14:42:02 2025
    From Newsgroup: comp.lang.forth

    Buzz McCool <buzz_mccool@yahoo.com> writes:
    Thanks Anton. May I ask if you have a particular CPU that you find >pleasurable to use in your daily work?

    AMD64 implementations by AMD and Intel are fast and run the OS of my
    choice (GNU/Linux), which cannot be said of ARM A64 or RISC-V
    implementations (either much slower or lack GNU/Linux support).

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
    New standard: https://forth-standard.org/
    EuroForth 2025 CFP: http://www.euroforth.org/ef25/cfp.html
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  • From antispam@antispam@fricas.org (Waldek Hebisch) to comp.lang.forth on Wed Dec 3 21:23:06 2025
    From Newsgroup: comp.lang.forth

    David Schultz <david.schultz@earthlink.net> wrote:
    On 12/2/25 12:25 AM, Paul Rubin wrote:
    You might like the TI MSP430 which is a 16-bit MCU line inspired by the
    PDP-11. It can't run Linux and it's now mostly eclipsed by ARM Cortex-M
    and maybe soon Risc-V MCU's, but its CISC-style addressing modes are
    convenient for Forth, and its hardware implementations have some neat
    features like built in non-volatile (ferromagnetic) RAM in some models.

    I ported eForth to an FRAM MSP430:

    http://davesrocketworks.com/electronics/msp430/eforth/index.html


    Having fiddled with ARM (an eForth for that too) I can safely say that
    the MSP430 is better for low power applications. You can put an ARM into something resembling a low power mode but it takes forever to start up again. At least in comparison to the MSP430.

    AFAIK if you are satisfied with default frequency from RC oscillator,
    then mainstream ARM-s start up pretty fast. MSP430 is nice because
    afer startup you can quickly switch to a different frequency, but
    for many purposes default frequency is OK. I did a silly LED blinker
    where LED is powered from separate source and MCU is responsible for
    timing and that needed about 10 uA for MCU. If you really care
    about low power you should use low-power MCU-s, like STM32L series
    or MSP432. Old STM32L could operate at about 4uA (measured current
    including LCD display).

    For me important limitation of low power modes was that in typical old
    MCU-s (and that includes MSP430 that I have) the only hardware active
    in low-power mode is real time clock and a bunch of wakeup pins.
    Modern MCU-s are much better in this aspect, there are everal low-power
    devices which draw very little power and can be active while main clock
    is switched off.
    --
    Waldek Hebisch
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  • From albert@albert@spenarnc.xs4all.nl to comp.lang.forth on Thu Dec 4 12:48:33 2025
    From Newsgroup: comp.lang.forth

    In article <2025Dec3.154202@mips.complang.tuwien.ac.at>,
    Anton Ertl <anton@mips.complang.tuwien.ac.at> wrote:
    Buzz McCool <buzz_mccool@yahoo.com> writes:
    Thanks Anton. May I ask if you have a particular CPU that you find >>pleasurable to use in your daily work?

    AMD64 implementations by AMD and Intel are fast and run the OS of my
    choice (GNU/Linux), which cannot be said of ARM A64 or RISC-V
    implementations (either much slower or lack GNU/Linux support).

    This is changing fast. I have the Orange pi RV2 , (riscv)
    and it has a 8 core over 1 Ghz CPU, and run several brands of GNU Linux,
    e.g.

    Welcome to Orange Pi 1.0.0 Noble with Linux 6.6.63-ky

    I do development work on ciforth RISCV 64, and it generates the
    html postscript pdf and info files allright.

    It doesnot compare in speed to my 25 Kg HP workstation, but fits in the
    palm of you hand and does a decent job of all mundane tasks, such as
    showing videos.
    It has support for AI engines build in, however I have not succeeded
    in trying that out.


    - anton

    Groetjes Albert
    --
    The Chinese government is satisfied with its military superiority over USA.
    The next 5 year plan has as primary goal to advance life expectancy
    over 80 years, like Western Europe.
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  • From anton@anton@mips.complang.tuwien.ac.at (Anton Ertl) to comp.lang.forth on Thu Dec 4 17:26:45 2025
    From Newsgroup: comp.lang.forth

    albert@spenarnc.xs4all.nl writes:
    In article <2025Dec3.154202@mips.complang.tuwien.ac.at>,
    Anton Ertl <anton@mips.complang.tuwien.ac.at> wrote:
    AMD64 implementations by AMD and Intel are fast and run the OS of my
    choice (GNU/Linux), which cannot be said of ARM A64 or RISC-V >>implementations (either much slower or lack GNU/Linux support).

    This is changing fast. I have the Orange pi RV2 , (riscv)
    and it has a 8 core over 1 Ghz CPU, and run several brands of GNU Linux,
    e.g.

    Welcome to Orange Pi 1.0.0 Noble with Linux 6.6.63-ky

    Looking at <http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-RV2.html>, it says:

    |Provides 40K+DMIPS CPU arithmetic and 2TOPS AI arithmetic, single-core
    |CPU arithmetic is more than 130% of ARM A55.

    And that's pretty much all about the CPU capabilities it says. It
    does not even say which "ARM A55" it is comparing to, especially not
    the clock rate. It also does not specify the clock rate of their own
    CPU.

    Concerning the "40K+DMIPS" number, <https://www.weathink.com/news/hangye/26.html> says:

    Cortex-A55 3.0 DMIPS/MHz
    Cortex-A76 10.7-12.4 DMIPS/MHz

    So according to this claim, the Orange pi RV2 performs like one
    13333MHz Cortex-A55 core, or maybe the 8 cores perform like 8 1663MHz Cortex-A55 vores. Meanwhile, the Radxa Rock5b that we have had for a
    while has 4 2200MHz Cortex-A76 cores and 4 1800MHz Cortex-A55 cores,
    with an overall 115K DMIPS (Using the smaller number for the DMIPS/MHz
    of the Cortex-A76.

    The Rock5b is nice compared to the other SBCs we have, but it does not
    compare to the AMD and Intel machines we have (the numbers are times
    in seconds, i.e., smaller numbers are better):

    sieve bubble matrix fib fft release; CPU; gcc
    0.020 0.021 0.012 0.027 0.015 20250115; AMD Ryzen 8700G 5000MHz; gcc-12.2.0 0.027 0.033 0.011 0.043 0.017 20250115; Golden Cove 3.8GHz (Core i3-1315U); gcc-10.2.1
    0.046 0.086 0.025 0.077 0.031 20250115; Gracemont 2.6GHz (Core i3-1315U); gcc-10.2.1
    0.103 0.120 0.040 0.094 0.039 20250219; Rock 5B RK3588 A76 2220MHz; gcc-9.2.1 0.205 0.234 0.136 0.270 0.134 20250219; Rock 5B RK3588 A55 1800MHz; gcc-9.2.1

    So a 5000MHz Zen 4 core is about 10 times as fast as a 1800MHz
    Cortex-A55. If a core on the Orange Pi RV2 performs like a 1663MHz
    Cortex-A55, the Zen4 core is more than 10 times as fast as such a
    core, and the 8 cores of the Ryzen 8700G are also more than 10 times
    as fast as the 8 cores of the Orange Pi RV2.

    And a 5000MHz Zen4 core is still 2.5-5 times faster than a 2220MHz
    Cortex-A76 on a Rock 5B.

    While reading up on the Orange Pi RV2, I came across an advert for the
    Radxa Orion O6, which appears to be more powerful than the Rock5b, but
    still quite a bit below what Intel and AMD offer, and and relatively
    expensive.

    It doesnot compare in speed to my 25 Kg HP workstation, but fits in the
    palm of you hand

    The NUC that produced the Golden Cove results also fits in your hand,
    although it's not quite as small as a Raspi.

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
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  • From Buzz McCool@buzz_mccool@yahoo.com to comp.lang.forth on Fri Dec 5 09:50:19 2025
    From Newsgroup: comp.lang.forth

    On 12/4/2025 9:26 AM, Anton Ertl wrote:

    sieve bubble matrix fib fft release; CPU; gcc
    0.020 0.021 0.012 0.027 0.015 20250115; AMD Ryzen 8700G 5000MHz; gcc-12.2.0 0.027 0.033 0.011 0.043 0.017 20250115; Golden Cove 3.8GHz (Core i3-1315U); gcc-10.2.1

    In comparing these two CPUs, it appears to me that single thread performance is the
    key factor.

    https://www.cpubenchmark.net/cpu.php?cpu=AMD+Ryzen+7+8700G&id=5836 https://www.cpubenchmark.net/cpu.php?cpu=Intel+Core+i3-1315U&id=5300




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  • From anton@anton@mips.complang.tuwien.ac.at (Anton Ertl) to comp.lang.forth on Fri Dec 5 17:53:22 2025
    From Newsgroup: comp.lang.forth

    Buzz McCool <buzz_mccool@yahoo.com> writes:
    On 12/4/2025 9:26 AM, Anton Ertl wrote:

    sieve bubble matrix fib fft release; CPU; gcc
    0.020 0.021 0.012 0.027 0.015 20250115; AMD Ryzen 8700G 5000MHz; gcc-12.2.0 >> 0.027 0.033 0.011 0.043 0.017 20250115; Golden Cove 3.8GHz (Core i3-1315U); gcc-10.2.1

    In comparing these two CPUs, it appears to me that single thread performance is the
    key factor.

    These are single-thread benchmarks, so of course single-thread
    performance is the key factor for performing well on them.

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
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  • From Buzz McCool@buzz_mccool@yahoo.com to comp.lang.forth on Fri Dec 5 10:28:33 2025
    From Newsgroup: comp.lang.forth

    On 12/5/2025 9:53 AM, Anton Ertl wrote:

    These are single-thread benchmarks, so of course single-thread
    performance is the key factor for performing well on them.

    Got it.

    So in my case an elegant CPU might boil down to something high on
    this list with a low price tag.

    https://www.cpubenchmark.net/single-thread/



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  • From anton@anton@mips.complang.tuwien.ac.at (Anton Ertl) to comp.lang.forth on Fri Dec 5 18:36:15 2025
    From Newsgroup: comp.lang.forth

    Buzz McCool <buzz_mccool@yahoo.com> writes:
    So in my case an elegant CPU might boil down to something high on
    this list with a low price tag.

    https://www.cpubenchmark.net/single-thread/

    If your goal is to have a good single-thread CPU Mark score, yes.

    In general, look for benchmarks that reflect what you are doing.

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
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